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855 IP
551
0.118
Linear Regulator IP, Output: 4.2V/1000mA, UMC 0.153um MS process
5.0V to 4.2V Linear Regulator with 1000mA driving capability, UMC 0.153um 1.8V/3.3V Logic/Mixed-Mode process....
552
0.118
Linear Regulator IP, Output: 5V/150mA, UMC 0.35um process
5V with 150mA driving capability, Istb=120uA Linear Regulator, 0.35um Logic process....
553
0.118
Linear Regulator IP, Output: 5V/50mA, UMC 0.35um process
5V with 50mA driving capability, Istb=124uA Linear Regulator, UMC 0.35um Logic process....
554
0.118
Linear Regulator IP, Output: 5V/70mA, UMC 0.35um Logic process
5V with 70mA driving capability, Istb=120uA Linear Regulator, 0.35um Logic process....
555
0.118
Linear Regulator IP, UMC 0.11um HS/AE process
3.3V to 1.2V Capacitor-Free Linear Regulator with 100mA driving capability, UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process...
556
0.118
Linear Regulator IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process 3.3V to 1.2V with 100mA driving capability, Linear Regulator with Capacitor-Free....
557
0.118
Linear Regulator IP, UMC 0.13um HS/FSG process
USB 2.0 Two Port PHY, UMC 0.13um HS/FSG Logic process....
558
0.118
Linear Regulator IP, UMC 0.18um G2 process
Input 2.7V~3.6V, Output=1.8V,Loading 50mA Regulator, UMC 0.18um GII 1.8V/3.3V Process...
559
0.118
Linear Regulator IP, UMC 40nm LP process
3.3V to 1.8V with 150mA driving capability, Linear Regulator, UMC 40nm LP/RVT Low-K Logic process....
560
0.118
Linear Regulator IP, UMC 40nm LP process
1.8V and 1.2V input, loading 360mA, 1.1V output with VBG=0.88V Regulator with BYPASS mode, UMC 40nm LP/RVT Low-K Logic process....
561
0.118
Linear Regulator IP, UMC 40nm LP process
3.3V to 1.1V/100mA REG, Linear Regulator, UMC 40nm LP/RVT Low-K Logic process....
562
0.118
Linear Regulator IP, UMC 90nm SP process
2.5V to 1.2V/100mA REG, Linear Regulator, UMC 90nm SP/RVT Low-K Logic process....
563
0.118
Linear Regulator IP, UMC 90nm SP process
3.3V to 1.0V/100mA REG, Linear Regulator, UMC 90nm SP/RVT Low-K Logic process....
564
0.118
Power on Reset IP, Input: 1.0V, UMC 65nm SP process
Vrr=0.67V, Vfr=0.62, input 1.0V, Core type, Power On Reset, UMC 65nm SP/RVT Low-K process....
565
0.118
Power on Reset IP, Input: 1.0V, UMC 90nm SP process
Vrr=0.67V Vfr=0.63V, input 1.0V, Core type, Power On Reset (with Self-Test Circuit), UMC 90nm SP/RVT Logic Low-K process....
566
0.118
Power on Reset IP, Input: 1.0V, Vrr=0.67V, Vfr=0.62V, UMC 55nm SP process
Vrr=0.67V, Vfr=0.62V, input 1.0V, Core type, Power On Reset, UMC 55nm SP/RVT Low-K process....
567
0.118
Power on Reset IP, Input: 1.0V/3.3V, UMC 40nm LP process
Vrr=2.33V Vfr=2.26V, input VCCK=1.0V VCC3IO=3.3V, 3.3V Power On Reset, special request, UMC 40nm LP/RVT Low-K Logic process....
568
0.118
Power on Reset IP, Input: 1.0V/3.3V, UMC 90nm SP process
Vrr=2V Vfr=1.95V, input VCCK=1.0V VCC3IO=3.3V, 3.3V Power On Reset, special request by ASAL, UMC 90nm SP/RVT Low-K Logic process....
569
0.118
Power on Reset IP, Input: 1.1V, UMC 40nm LP process
Vrr=0.8V, Vfr=0.65V, input VCC=1.1V, 1.1V Power On Reset, UMC 40nm LP/RVT Low-K Logic process....
570
0.118
Power on Reset IP, Input: 1.2V, UMC 0.11um HS/AE process
Power on reset(POR) block, UMC 0.11um HS/AE (AL Advance Enhancement) Logic process....
571
0.118
Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process
Vrr=0.8V Vfr=0.65V, VCC=1.2V, Ivcc=12.7uA, HS process with A-type IO., Power On Reset, UMC 0.13um HS/FSG Logic process....
572
0.118
Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process
Vrr=0.75V Vfr=0.65V, input 1.2V, Core type, Power On Reset, UMC 0.13um HS/FSG Logic process....
573
0.118
Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process
Vrr=0.75V Vfr=0.65V, input 1.2V, Core type, Power On Reset, UMC 0.13um HS/FSG Logic process....
574
0.118
Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process
Vrr=0.8V Vfr=0.65V, VCC=1.2V, Ivcc=11.7uA, Core type, Power On Reset, UMC 0.13um HS/FSG Logic process....
575
0.118
Power on Reset IP, Input: 1.2V, UMC 0.13um LL/FSG process
Vrr=0.8V Vfr=0.65V, VCC=1.2V, Ivcc=10.7uA, Core type, Power On Reset, UMC 0.13um LL Logic(FSG) process....
576
0.118
Power on Reset IP, Input: 1.2V, UMC 0.13um SP/FSG process
Vrr=0.76V Vfr=0.66V, input 1.2V, Core type, Power On Reset, UMC 0.13um SP Logic(FSG) process....
577
0.118
Power on Reset IP, Input: 1.2V, UMC 0.13um SP/FSG process
Vrr=0.76V Vfr=0.66V, input 1.2V, Core type, Power On Reset, UMC 0.13um SP Logic(FSG) process....
578
0.118
Power on Reset IP, Input: 1.2V, UMC 90nm LL process
Vrr=0.7V, Vfr=0.65V, input VCCK=1.2V, Core Type Power On Reset, UMC 90nm Logic/Mixed-Mode LL/RVT Low-K process....
579
0.118
Power on Reset IP, Input: 1.2V, Vrr=0.8V, Vfr=0.65V, UMC 55nm LP process
Vrr=0.8V, Vfr=0.65V, input VCC=1.2V, 1.2V Power On Reset, UMC 55nm 2T LP/RVT Low-K Logic process....
580
0.118
Power on Reset IP, Input: 1.2V, Vrr=Vfr=0.8V, UMC 55nm LP process
Vrr=Vfr=0.8V, input VCC=1.2V, 1.2V Power On Reset, UMC 55nm 2T LP/RVT Low-K Logic process....
581
0.118
Power on Reset IP, Input: 1.5V - 3.9V, UMC 55nm SP process
3.9~1.5V (RTC Core Cell Library operating voltage+), Rise-relax voltage (Vrr), min. 1.6V (1.6V~2.3V) Power On Reset, UMC 55nm SP/RVT Low-K Logic proce...
582
0.118
Power on Reset IP, Input: 1.5V, UMC 0.15um SP process
Vrr=1.1V Vfr=0.95V, VCC=1.5V, B-type IO., Power On Reset, UMC 0.15um SP Logic process....
583
0.118
Power on Reset IP, Input: 1.8V, HJTC 0.18um eFlash/G2 process
Vrr=1.35V, Vfr=1.25V, 1.8V Power on Reset, HJTC 0.18um eFlash 1.8V/3.3V/5V process....
584
0.118
Power on Reset IP, Input: 1.8V, Output: 1.8432MHz, HJTC 0.18um eFlash/G2 process
Vrr=1.4V, Vfr=1.15V, 1.8V Power on Reset, HJTC 0.18um eFlash 1.8V/3.3V/5V process....
585
0.118
Power on Reset IP, Input: 1.8V, UMC 0.153um MS process
Vrr=1.2V Vfr=1.0V, input 1.8V, Core type (with Self-Test Circuit), Power On Reset, UMC 0.153um Mixed-Mode/Logic process....
586
0.118
Power on Reset IP, Input: 1.8V, UMC 0.162um Logic process
Vrr=1.2V Vfr=1.0V, input 1.8V, Core type (with Self-Test Circuit), Power On Reset, UMC 0.162um Logic process....
587
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um eFlash/G2 process
Vrr=1.2V Vfr=1.0V, input 1.8V, Core type, Power On Reset, UMC 0.18um e-Flash process....
588
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, B type IO, Power On Reset, UMC 0.18um GII Logic process....
589
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, C type IO, Power On Reset, UMC 0.18um GII Logic process....
590
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, D type IO, Power On Reset, UMC 0.18um GII Logic process....
591
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, Core type, Power On Reset, UMC 0.18um GII Logic process....
592
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
FXPORD730HA0A 0.18um power on reset at the corner of D-type IO Vrr=1.2V Vfr=1V, Power On Reset, UMC 0.18um GII Logic process....
593
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, input 1.8V, Core type, Power On Reset, UMC 0.18um GII Logic process....
594
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, input 1.8V, Core type (with Self-Test Circuit), Power On Reset, UMC 0.18um GII Logic process....
595
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, input 1.8V, Core type, Power On Reset, UMC 0.18um GII Logic process....
596
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um LL process
Vrr=1.2V Vfr=1.1V, VCC=1.8V, Ivcc=12.2uA, Core type, Power On Reset, UMC 0.18um LL Logic process....
597
0.118
Power on Reset IP, Input: 2.5V - 3.3V, UMC 0.13um HS/FSG process
2.5V~3.3V POR, UMC 0.13um HS/FSG Logic process....
598
0.118
Power on Reset IP, Input: 2.5V, UMC 0.25um process
Vrr=1.8V Vfr=1.6V, VCC=2.5V, Ivcc=13.4uA, B type IO, Power On Reset, UMC 0.25um Logic process....
599
0.118
Power on Reset IP, Input: 2.5V, UMC 0.25um MS process
Power on Reset circuit tolerant with 0.25um, 2.5V MMC and Logic process VCC=2.5V, B type IO, Power On Reset, UMC 0.25um Logic process....
600
0.118
Power on Reset IP, Input: 2.5V, UMC 40nm LP process
2.5V Power On Reset, Vrr=1.90 without Vfr, UMC 40nm LP/RVT Low-K Logic process....